allow state transition at 0:00
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parent
c8a3b50681
commit
0c20cb9993
14
main.c
14
main.c
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@ -20,7 +20,9 @@ volatile bool tick = false; // Set high when jiffy clock ticks
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// Clocks are in deciseconds
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uint16_t score_a = 0;
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uint16_t score_b = 0;
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int16_t period_clock = -600 * 30;
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int16_t period_clock = -(30 * 60 * 10);
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int16_t jam_duration = -(2 * 60 * 10);
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int16_t lineup_duration = (-30 * 10);
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int16_t jam_clock = 0;
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enum {
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SETUP,
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@ -69,6 +71,8 @@ const uint8_t setup_digits[] = {
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0x1b, 0x12, 0x72
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};
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const
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#define mode(on) bit(PORTD, MODE, on)
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#define sin(on) bit(PORTD, SIN, on)
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#define sclk(on) bit(PORTD, SCLK, on)
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@ -212,14 +216,14 @@ update_controller()
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uint8_t val = nesprobe();
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int inc = 1;
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if ((val & BTN_A) && (state != JAM)) {
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if ((val & BTN_A) && ((state != JAM) || (jam_clock == 0))) {
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state = JAM;
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jam_clock = -600 * 2;
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jam_clock = jam_duration;
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}
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if ((val & BTN_B) && (state != LINEUP)) {
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if ((val & BTN_B) && ((state != LINEUP) || (jam_clock == 0))) {
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state = LINEUP;
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jam_clock = -300;
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jam_clock = lineup_duration;
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}
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if ((val & BTN_START) && (state != TIMEOUT)) {
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