vail-adapter

Vail V1 PCB.kicad_prl

  1{
  2  "board": {
  3    "active_layer": 2,
  4    "active_layer_preset": "All Layers",
  5    "auto_track_width": true,
  6    "hidden_netclasses": [],
  7    "hidden_nets": [],
  8    "high_contrast_mode": 0,
  9    "net_color_mode": 1,
 10    "opacity": {
 11      "images": 0.6,
 12      "pads": 1.0,
 13      "shapes": 1.0,
 14      "tracks": 1.0,
 15      "vias": 1.0,
 16      "zones": 0.6
 17    },
 18    "selection_filter": {
 19      "dimensions": true,
 20      "footprints": true,
 21      "graphics": true,
 22      "keepouts": true,
 23      "lockedItems": false,
 24      "otherItems": true,
 25      "pads": true,
 26      "text": true,
 27      "tracks": true,
 28      "vias": true,
 29      "zones": true
 30    },
 31    "visible_items": [
 32      "vias",
 33      "footprint_text",
 34      "footprint_anchors",
 35      "ratsnest",
 36      "grid",
 37      "footprints_front",
 38      "footprints_back",
 39      "footprint_values",
 40      "footprint_references",
 41      "tracks",
 42      "drc_errors",
 43      "drawing_sheet",
 44      "bitmaps",
 45      "pads",
 46      "zones",
 47      "drc_warnings",
 48      "locked_item_shadows",
 49      "conflict_shadows",
 50      "shapes"
 51    ],
 52    "visible_layers": "ffffffff_ffffffff_ffffffff_ffffffff",
 53    "zone_display_mode": 0
 54  },
 55  "git": {
 56    "repo_type": "",
 57    "repo_username": "",
 58    "ssh_key": ""
 59  },
 60  "meta": {
 61    "filename": "Vail V1 PCB.kicad_prl",
 62    "version": 5
 63  },
 64  "net_inspector_panel": {
 65    "col_hidden": [
 66      false,
 67      false,
 68      false,
 69      false,
 70      false,
 71      false,
 72      false,
 73      false,
 74      false,
 75      false
 76    ],
 77    "col_order": [
 78      0,
 79      1,
 80      2,
 81      3,
 82      4,
 83      5,
 84      6,
 85      7,
 86      8,
 87      9
 88    ],
 89    "col_widths": [
 90      162,
 91      147,
 92      91,
 93      67,
 94      91,
 95      91,
 96      91,
 97      71,
 98      91,
 99      91
100    ],
101    "custom_group_rules": [],
102    "expanded_rows": [],
103    "filter_by_net_name": true,
104    "filter_by_netclass": true,
105    "filter_text": "",
106    "group_by_constraint": false,
107    "group_by_netclass": false,
108    "show_unconnected_nets": false,
109    "show_zero_pad_nets": false,
110    "sort_ascending": true,
111    "sorting_column": 0
112  },
113  "open_jobsets": [],
114  "project": {
115    "files": []
116  },
117  "schematic": {
118    "selection_filter": {
119      "graphics": true,
120      "images": true,
121      "labels": true,
122      "lockedItems": false,
123      "otherItems": true,
124      "pins": true,
125      "symbols": true,
126      "text": true,
127      "wires": true
128    }
129  }
130}